Electronic Design

Flow Implements C++ DSP Algorithms in FPGAs

Using a design flow put together by Mentor Graphics and Altera, designers can implement complex DSP algorithms in high-performance FPGAs directly from ANSI C++ code. The flow, which is based on Altera ...
EDN

Implementing floating-point DSP on FPGAs

For developers using FPGAs for the implementation of floating-point DSP functions, one key challenge is how to decompose the computation algorithm into sequences of parallel hardware processes while ...
EDN

Altera pushes top-down flow for DSP algorithms

SAN FRANCISCO — Trying to capitalize on the performance edge FPGAs have shown in some DSP applications, Altera Corp. this week will show top-down design tools and development platforms designed to ...
Electronic Design

DSP Goes From Algorithm To Implementation

To implement algorithms, digital-signal-processing (DSP) developers have had to rely upon design flows that use manual approaches. Aside from being time consuming, the manual process can invite errors ...